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Principal Performance Engineer

Cornelis Networks, Inc.
locationSan Jose, CA, USA
PublishedPublished: 6/14/2022
Engineering
Full Time

Job Description

Job DescriptionSalary:

Cornelis Networks delivers the worlds highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware,softwareand system level technologies to maximize the efficiency of GPU,CPUand accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation,performanceand scalability - solving the worlds most demanding computational challenges with our next-generation networking solutions.


We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proventrack recordof building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.

Were seeking a Principal Performance Engineer to drive end-to-end performance for next-generation networking silicon and systems (adapters, switches, software). You will help set the performance strategy, lead investigations across layers (switch/silicon drivers AI/HPC workloads), and enable large-scale customer deployments across multiple verticals (cloud, autonomous, aerospace/defense, manufacturing, life sciences, climate).Youll partner directly with architecture, firmware, software, and lighthouse customers to raise the performance ceiling. This is a high-impact, highly visible individual-contributor role with technical leadership scoping (mentoring, cross-functional influence).


Key Responsibilities:

  • Own pre- and post-launch performance: plan, execute, and sustain performance validation, debugging, and optimization for adapters, switches, and fabric softwarefirst in lab, then at scale in production.
  • Lead performance for post-silicon bring-up validation of networking ASICs and end-products (adapters, switches, etc.); driving optimization and characterization against networking metrics and application performance.
  • Deliver white-glove customer support at scale: reproduce field issues, co-debug in shared/onsite labs, land mitigations and durable fixes, and publish per-customer tuning guides; opportunity to grow into customer performance support lead while remaining an IC.
  • Pathfind and optimize forward-looking workloads: drive research and enablement for AI inference (QPS, P99/P99.9, cost/throughput), distributed AI training (NCCL/RCCL collectives), and traditional HPC (manufacturing, life sciences, climate).
  • Multi-fabric research & enablement: evaluate and tune Cornelis/Omni-Path, Ethernet/RoCEv2, and InfiniBand across topologies (Clos/fat-tree/dragonfly), routing (ECMP/adaptive), and congestion control (credit, PFC/ECN/DCQCN)
  • Explore platform designs & tunings end-to-end: CPU/GPU NUMA placement, PCIe/GPU-Direct, BIOS/firmware, PTP/1588, switch/NIC QoS & scheduling, queue depths, microburst tolerance, ECN mark rates, retransmits, fairness.
  • Design credible experiments: synthesize representative traffic, replay workload traces, and run on-cluster A/B tests with statistically sound comparisons (P50/P90/P99).


RequiredQualifications:

  • 10+ years in performance engineering, post-silicon/perf validation, or systems performance for high-speed networking or HPC/AI products.
  • Post-silicon expertise: hands-on bring-up and performance validation of networking ASICs/systems (adapters, switches), including crafting validation plans, establishing pass/fail, correlating pre-silicon models to silicon, and driving fixes from first silicon through production.
  • Demonstrated depth in networking hardware (switch/silicon) and software debug for performance tuning and issue resolution across production-scale deployments.
  • Hands-on multi-fabric experience: Cornelis/Omni-Path, Ethernet/RoCEv2, and/or InfiniBand; strong grasp of PCIe/GPU-Direct, queueing/QoS, and congestion control (credit, PFC, ECN, DCQCN).
  • AI/HPC workload fluency: NCCL/RCCL collectives, UCX/libfabric/MPI; ability to optimize end-to-end training and inference (throughput, QPS, tail latency, efficiency) on real clusters.
  • Experimentation & analysis: workload modeling, on-cluster A/B tests, tail-latency analysis (P50/P90/P99); ability to separate congestion from compute/IO bottlenecks.
  • Automation: Python + Linux; data pipelines, dashboards, and CI hooks to prevent performance regressions.
  • Excellent cross-functional communication; leads without authority and drives fixes across architecture, firmware, driver, and fabric software teams.
  • BS/MS in CE/EE/CS (or equivalent experience).


Preferred Qualifications:

  • Experience supporting customer-facing performance optimization or field application engineering.
  • Built or led aspects of a white-glove performance support program; mentored engineers and scaled best practices via playbooks and labs.
  • Inference-stack familiarity (e.g., NVIDIA Triton, TensorRT-LLM, vLLM) incl. batching, KV-cache, and MIG/MPS trade-offs.
  • Benchmarking background: MLPerf exposure; HPC app tuning (e.g., LS-Dyna, Fluent, OpenFOAM, GROMACS) and OSU/MPI microbenchmarks.
  • Contributions to UCX, libfabric, NCCL/RCCL, or kernel networking; comfort with eBPF/perf/tcpdump and detailed switch/NIC telemetry.
  • Deep understanding of networking and memory data flows, including technologies such as DPDK, RDMA, or similar high-performance I/O frameworks.


Location: This role fully supports remote work for employees residing within the United States, with the flexibility to travel to our Chesterbrook Corporate Center located in Wayne, PA occasionally for in-person collaboration.


We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.


At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.


In addition to your base pay, youll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.


Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law.We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.


remote work

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